Innovation Sphere

Researchers

  • Yuping Zeng
  • Kazy Shariar

Communicate

Details

Project TitleFabrication Method of Novel Tunneling Field Effect Transistor and Thereof
Track Code2017-046
Short Description

TECHNOLOGY DESCRIPTION:

This fabrication method is used to form a tunneling field effect (TFET) semiconductor device via T-shaped source and drain region. This design allows a self-aligned technique to form responsive to gate metallization. This process is meant to minimize the distance between the gate of the source/drain region and in return, the high speed performance is improve. In addition, the TFET is created using a novel approach of transferring whole InAs/AlSb/GaSb stack from its epitaxial grown substrate to SiO2/Si substrate.

STAGE OF DEVELOPMENT: 

This technology is currently under continuing research, testing, and prototype development.

APPLICATIONS: 

This is a method potentially applicable for commercial use in digital switches, lower power amplifiers and RAM memory storage.

PROBLEMS ADDRESSED:

As transistors take on more functions and innovations, they have become smaller and smaller through time. As a result, a common problem that has been observed involving considerable current leakage which leads to unmanageable loss of power in devices. This specific fabrication method was designed to decrease energy consumption and allows for longer usage times for individual devices.

AbstractNone
 
Tagsdigital switch, power amplifers, tunneling, transistor, semiconductor, fabrication
 
Posted DateAug 9, 2017 1:12 PM

Researcher

Name
Yuping Zeng
Kazy Shariar

Manager

Name
Gill Prabhpreet

Benefits

  • Easier processing with novel T-shape
  • Higher speed
  • Lower energy consumption à cost-effective

Uses/Users

Inquiry

Denise Bierlein

Licensing Analyst

Telephone:  302-831-4005

Email:  techtransfer@udel.edu

Intellectual Property

Patent Number Issue Date Type Country of Filing
Patent Pending None Provisional United States